A content addressable memory (CAM) device is a storage device that can be instructed to compare a specific pattern of comparand data with data stored in its associative CAM array. The entire CAM array, or segments thereof, are searched in parallel for a match with the comparand data. If a match exists, the CAM device indicates the match by asserting a match flag. Multiple matches may also be indicated by asserting a multiple match flag. The CAM device typically includes a priority encoder to translate the highest priority matching location into a match address or CAM index.
The generally fast parallel search capabilities of CAMs have proven useful in many applications including address filtering and lookups in routers and networking equipment, policy enforcement in policy-based routers, pattern recognition for encryption/decryption and compression/decompression applications, and other pattern recognition applications.
Binary CAM cells are able to store two states of information: a logic one state and a logic zero state. Binary CAM cells typically include a RAM cell and a compare circuit. The compare circuit compares the comparand data with data stored in the RAM cell and drives a match line to a predetermined state when there is a match. Columns of binary CAM cells may be globally masked by mask data stored in one or more global mask registers. Ternary CAM cells are mask-per-bit CAM cells that effectively store three states of information, namely: a logic one state, a logic zero state, and a don't care state for compare operations. Ternary CAM cells typically include a second RAM cell that stores local mask data for the each ternary CAM cell. The local mask data masks the comparison result of the comparand data with the data stored in the first RAM cell such that the comparison result does not affect the match line. The ternary CAM cell offers more flexibility to the user to determine on an entry-per-entry basis which bits in a word will be masked during a compare operation.